A chip carrier is a semiconductor package that allows an integrated circuit to be mounted onto a PCB. A typical chip carrier comprises one or more integrated circuits mounted on a leadframe and encapsulated in a casing, for example a ceramic casing or a resin casing. Many chip carriers are leaded chip carriers having connection leads extending from the casing for attaching the chip carrier to a PCB and for making connections between an integrated circuit and the PCB. Some chip carriers are leadless chip carriers having exposed lead frame pads mounted within the casing for making connections to a PCB.
Heat generated by integrated circuits may need to be removed in order to maintain operation. Thus, these integrated circuits within a chip carrier are typically mounted on a die pad or heat sink. In some chip carriers the heat sink is exposed through a surface of the package casing to be attached to a PCB. A die pad may alternatively, or additionally, act as an electrical grounding for the integrated circuit.
At present a large proportion of chip carriers are leaded chip carriers. One disadvantage of using leaded chip carriers is that the leads of the chip carrier may bend easily and, therefore, careful handling of the leaded chip carriers is required. Any leads that are misaligned will not be able to connect to corresponding connections on a PCB. To this end, leaded chip carriers require special handling trays to avoid bent or damaged connection leads. Lead inductance may also be undesirable, and the leads contribute to the weight of the chip carrier package.
Some problems associated with leaded chip carriers may be solved by use of a leadless chip carrier. The lead frame pads of a leadless chip carrier do not extend beyond the surface of the package casing that they are encapsulated within and, thus, leadless chip carriers may be handled robustly without damage to the lead frame pads. Leadless chip carriers may be coupled directly to a PCB by means of low profile solder joints. No special handling is required to avoid damaging the package and it is easier to correctly align a leadless chip carrier onto a PCB than it is to align a leaded chip carrier. Furthermore, leadless chip carrier packages such as a quad flat no-leads (QFN) package may provide a small sized “near chip scale” footprint, a thin profile and a low weight, as well as good thermal and electrical performance. Such properties make leadless chip carriers an advantageous choice for applications where size, weight, and thermal and electrical performance are important.
Despite the advantages associated with leadless chip carriers the nature of the leadless construction presents some reliability issues. The lead frame pads of a leadless chip carrier are set within the package casing and, effectively, are inflexible. Leadless chip carriers are generally attached to a PCB by means of a low profile solder joint. A typical solder joint height would be in the range from 50 to 75 micrometers. Certain packages can be bonded with a solder joint as little as 30 micrometers in height. Because there are no flexible leads to accommodate stresses and strains, leadless chip carriers provide very little compliance during thermal cycling, thermal shock, physical shock, and vibration. Effectively, all stresses and strains need to be accommodated within the thin solder joint. The stresses within a solder joint increase with any mismatch in the coefficient of thermal expansion between the solder and the lead frame of the chip carrier and the PCB. Joint stresses also increase with increases in package size. For some packages the joint lifetime may be as low as a few hundred temperature cycles.
In addition to joint reliability issues, leadless chip carriers may also provide a number of assembly issues. Difficulties in applying the correct amount of solder may result in the chip carrier tipping, floating or in defects forming in the joint between the chip carrier and the PCB, such as excess voidage.
It is an aim of the present application to provide an improved leadless chip carrier having an improved joint reliability.